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Introduction

AES-256 RSM (v4)

AES-128 RSM (v4.2)

Tools

Participate

Frequently Asked Questions

Acknowledgments

Introduction

The DPA contest v4 is the fourth edition of the DPA contest. As the previous editions, it is organized by the Digital Electronic Systems research group from the Communication & Electronics department of the Télécom ParisTech french University.

The key points of this fourth edition of the DPA contest are summarized below.

Current status

This fourth edition was officially launched on July 9, 2013 with a first implementation (AES256-RSM)

The second implementation (v4.2) based on an improved version of the first has been available since September 16, 2014.

Latest news

You can monitor the progression of the contest and the latest news by following our Twitter account or by subscribing to our announcement mailing list.

Important information (August 27, 2015): An error has been detected (thanks to Zdeněk Martinásek et Liran Lerman) in the implementation used to perform the acquisitions for the DPA contest v4.2 (AES-128 Improved RSM). Due to a bug, the permutation function Shuffle10 is used before the first round instead of Shuffle0. We sincerely want to apologize for the inconvenience.

Sponsors

Cryptography Research SPACES project

Thanks to sponsorship from Cryptography Reasearch Inc., two SAKURA-G boards has been offered to the two winners of the DPA contest v4.1 (AES-256 RSM):

Ten other SAKURA-G boards will be offered to academic teams that will participate to the future DPA contest V5.
Instructions to apply can be found on this webpage.

Organizers

Institut Mines-Télécom logo Télécom ParisTech logo

Disclamer

The data and code provided by www.dpacontest.org apply to the evaluation of academic, unprotected and whitebox cryptographic implementations. The goal of this contest is definitely not to encourage piracy on whatsoever commercial hardware; instead, it aims at enhancing the state-of-the-art of ``hardware security'' against observation attacks. This approach has proved to be efficient in cryptography: the AES, the SHA-3 or the eSTREAM contests are emblematic in this respect. We wish to apply this model at the hardware level. The advances in this field also help prepare the security challenges to be met with the advent of forthcoming nano-technologies.